Data Sheet
The SDP has a Macrovision? detection circuit, which allows
Type I, Type II, and Type III Macrovision protection levels. The
decoder is also fully robust to all Macrovision signal inputs.
SDP features include
ADV7802
VBI DATA PROCESSOR
The VBI data processor (VDP) of the ADV7802 is capable of
slicing multiple vertical blanking interval data standards on SD
video and component video. The VDP decodes the VBI data on
?
?
Advanced adaptive 3D comb with concurrent 3D noise
reduction (using external DDR SDRAM memory)
Adaptive 2D five-line comb filters for NTSC and PAL that
give superior chrominance and luminance separation for
composite video
the incoming CVBS/YC or YUV data processed by the SDP core.
It can also decode VBI data on the luma channel of YUV data
processed through the CP core.
The VDP can process a variety of VBI data standards, such as
? Teletext
?
?
?
?
Full automatic detection and autoswitching of all
worldwide standards (PAL, NTSC, and SECAM)
Automatic gain control with white peak mode that
ensures that the video is always processed without loss of
the video processing range
Proprietary architecture for locking to weak, noisy, and
unstable sources from VCRs and tuners
IF filter block that compensates for high frequency luma
attenuation due to tuner SAW filter
?
?
?
?
?
?
?
Video programming system (VPS)
Vertical interval time codes (VITC)
Closed captioning (CC) and extended data service (EDS)
Wide screen signaling (WSS)
Copy generation management system (CGMS, CGMS
Type B)
Gemstar? 1×/2× electronic program guide compatible
Extended data service (SDS); the data extracted can be read
?
?
?
?
?
?
?
?
?
?
?
?
LTI and CTI
Vertical and horizontal programmable luma peaking filters
True full 12-bit deep color processing path from front to
back end in 4:4:4/4:2:2 RGB/YCrCb formats
4× oversampling (54 MHz) for CVBS, S-Video, and
YUV modes
Line-locked clock output (LLC)
Free run output mode that provides stable timing when no
video input is present
Internal color bar test pattern
Advanced TBC with frame synchronization, which ensures
nominal clock and data for nonstandard input
Interlace-to-progressive conversion for 525i and 625i
formats, enabling direct drive of HDMI Tx devices
Color controls that include hue, brightness, saturation,
and contrast
Differential gain (DG), typically 0.45%
Differential phase (DP), typically 0.45°
back over a fast I 2 C interface
COMPONENT PROCESSOR
The component processor (CP) is capable of decoding and digi-
tizing a wide range of component video formats in any color
space. The CP can accept video data from the analog front
end or from the HDMI receiver. Component video standards
supported by the CP include 525i, 625i, 525p, 625p, 720p, 1080i,
1080p, and VGA (up to SXGA at 75 Hz), and many other
standards.
A fully programmable any-to-any, 3 × 3 color space conversion
(CSC) matrix is placed before the CP. This enables YPrPb-to-
RGB and RGB-to-YCrCb conversions of video data coming
from the analog front end or from the HDMI receiver. Many
other standards of color space can be implemented using the
color space converter.
The CP of the ADV7802 contains an automatic gain control
(AGC) block. The AGC is followed by a clamp circuit that
ensures that the video signal is clamped to the correct blanking
level. Automatic adjustments within the CP include gain
(contrast) and offset (brightness). Manual adjustment controls
are also supported. In cases where no embedded synchroni-
zation is preset, the video gain can be set manually.
Rev. D | Page 15 of 36
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